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onsemi ENGR PRIN, ANALOG_TL in India

ENGR PRIN, ANALOG_TL - ( 2204519 )


The candidate is expected to have 8 years experience in analog/mixed signal IC layout in CMOS technology. Candidate is expected to do top level floorplanning, and lead other team members in assigning and integrating sub blocks, in addition to doing layout of blocks. The candidate will work closely with packaging and digital place and route teams for chip level integration. Candidate should be well versed in Virtuoso, and run LVS/DRC/extraction using tools such as Calibre. Candidate should have good understanding of power planning, matching, parasitics, EM, etc. Candidate should have good communication and teamwork skills.


Bachelors/Masters with 8 years of experience preferred.

Primary Location : India-IN-India

Job : Engineering

Travel : Yes, 5 % of the Time

Job Posting : Sep 27, 2022, 1:40:19 AM

Req ID: 2204519

ON Semiconductor is an Equal Employment Opportunity Employer and prohibits discrimination on the basis of age, race, color, religion, gender, sexual orientation, national origin, citizenship, protected veteran status, disability status, or any other federal, state or local protected classes. ON is committed to providing equal employment opportunity to qualified individuals, regardless of protect class status.